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ckfwq/linux-3.0.4/arch/mips/loongson/gsc3280/platform.c

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2024-12-30 10:53:50 +08:00
#include <linux/device.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/resource.h>
#include <linux/dma-mapping.h>
#include <linux/gsc3280mac.h>
#include <linux/interrupt.h>
#include <linux/mmc/gsc3280_mmc.h>
#include <linux/fb.h>
#include <video/gsc3280_lcdfb.h>
#include <sound/alc5623.h>
#include <linux/i2c.h>
#include <linux/gsc3280_dma.h>
#include <linux/gsc3280_sci.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <gsc3280/gsc3280_int.h>
#include <gsc3280/gsc3280_regs.h>
#include <gsc3280/sysctl.h>
#include <asm-generic/sizes.h>
#include <linux/spi/gsc3280_spi.h>
//#include <linux/gsc3280_dma.h>
/***********************just for EMI(GPIO)&NANDFLASH IOMUX test**********************************/
static DEFINE_MUTEX(gnmutex);
void gpio_nand_lock(void) {
mutex_lock(&gnmutex);
}
void gpio_nand_unlock(void) {
mutex_unlock(&gnmutex);
}
EXPORT_SYMBOL(gpio_nand_lock);
EXPORT_SYMBOL(gpio_nand_unlock);
/*************************************END********************************************************/
#ifdef CONFIG_MMC_GSC3280
static int sd_init(u32 slot_id, irq_handler_t int_num, void *data)
{
return 0;
}
static struct resource gsc3280_sd_resources[] = {
{
.start = GSC3280_SDIO_BASEADDR & 0x1fffffff,
.end = (GSC3280_SDIO_BASEADDR & 0x1fffffff) + 0x104 -1,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_SD_IRQ,
.end = EXT_GSC3280_SD_IRQ,
.flags = IORESOURCE_IRQ,
}
};
struct gsc3280_mci_board gsc3280_mci = {
.init = sd_init,
.num_slots = 1,
.bus_hz = 50000000,
.quirks = GSC3280_MCI_QUIRK_IDMAC_DTO | GSC3280_MCI_QUIRK_RETRY_DELAY | GSC3280_MCI_QUIRK_HIGHSPEED,
};
struct platform_device gsc3280_sd_device = {
.name = "gsc3280_mmc",
.id = 0,
.num_resources = ARRAY_SIZE(gsc3280_sd_resources),
.resource = gsc3280_sd_resources,
.dev = {
.platform_data = &gsc3280_mci,
}
};
#endif
#define PBMEM(base) \
{ \
.start = base, \
.end = base + 0x1fff, \
.flags = IORESOURCE_MEM, \
}
#define IRQ(num) \
{ \
.start = num, \
.end = num, \
.flags = IORESOURCE_IRQ, \
}
#define NAMED_IRQ(num, _name) \
{ \
.start = num, \
.end = num, \
.name = _name, \
.flags = IORESOURCE_IRQ, \
}
#define DEFINE_DEV(_name, _id) \
static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
static struct platform_device _name##_id##_device = { \
.name = #_name, \
.id = _id, \
.dev = { \
.dma_mask = &_name##_id##_dma_mask, \
.coherent_dma_mask = DMA_BIT_MASK(32), \
}, \
.resource = _name##_id##_resource, \
.num_resources = ARRAY_SIZE(_name##_id##_resource), \
}
#define DEFINE_DEV_DATA(_name, _id) \
static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
static struct platform_device _name##_id##_device = { \
.name = #_name, \
.id = _id, \
.dev = { \
.dma_mask = &_name##_id##_dma_mask, \
.platform_data = &_name##_id##_data, \
.coherent_dma_mask = DMA_BIT_MASK(32), \
}, \
.resource = _name##_id##_resource, \
.num_resources = ARRAY_SIZE(_name##_id##_resource), \
}
#define select_peripheral(port, pin_mask, periph, flags) \
at32_select_periph(GPIO_##port##_BASE, pin_mask, \
GPIO_##periph, flags)
#define DEV_CLK(_name, devname, bus, _index) \
static struct clk devname##_##_name = { \
.name = #_name, \
.dev = &devname##_device.dev, \
.parent = &bus##_clk, \
.mode = bus##_clk_mode, \
.get_rate = bus##_clk_get_rate, \
.index = _index, \
}
#ifdef CONFIG_GSC3280MAC_ETH
static struct plat_gsc3280macenet_data gsc3280maceth0_data = {
.pmt = 0,
.enh_desc = 0,
.pbl = 16,
};
static struct resource gsc3280maceth0_resource[] = {
PBMEM(GSC3280_MAC_MAC_BASEADDR),
NAMED_IRQ(EXT_GSC3280_MAC_IRQ, "macirq"),
};
DEFINE_DEV_DATA(gsc3280maceth, 0);
static struct plat_gsc3280macphy_data gsc3280macphy0_data = {
.bus_id = 0,
#ifndef CONFIG_BLX_MAC_VERIFY_PHY
.phy_addr = 0,
#else
.phy_addr = 1,
#endif
};
static struct resource gsc3280macphy0_resource[] = {
NAMED_IRQ(0, "phyirq")
};
DEFINE_DEV_DATA(gsc3280macphy, 0);
#endif /* CONFIG_GSC3280MAC_ETH */
#ifdef CONFIG_KEYPAD_GSC3280
/*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/* For GSC3280 keypad
*/
#define GSC3280_PA_KEYPAD GSC3280_KEYPAD_BASEADDR
#define GSC3280_SZ_KEYPAD 20
static struct resource gsc3280_keypad_resource[] = {
[0] = {
.start = GSC3280_PA_KEYPAD,
.end = GSC3280_PA_KEYPAD + GSC3280_SZ_KEYPAD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_KEYPAD_IRQ,
.end = EXT_GSC3280_KEYPAD_IRQ,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = EXT_GSC3280_KEYPAD_WAKE_IRQ,
.end = EXT_GSC3280_KEYPAD_WAKE_IRQ,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device gsc3280_device_keypad = {
.name = "gsc3280_keypad",
.id = -1,
.num_resources = ARRAY_SIZE(gsc3280_keypad_resource),
.resource = gsc3280_keypad_resource,
};
#endif /* CONFIG_KEYPAD_GSC3280*/
/*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/* For GSC3280 PS2
*/
#ifdef CONFIG_SERIO_GSC3280PS2
#define GSC3280_PA_PS2_0 GSC3280_PS2_0_BASEADDR
#define GSC3280_SZ_PS2_0 24
#define GSC3280_PA_PS2_1 GSC3280_PS2_1_BASEADDR
#define GSC3280_SZ_PS2_1 24
#ifdef CONFIG_PS2_0
static int ps2_0_type = CONFIG_PS2_0_TYPE;
static struct resource gsc3280_PS2_0_resource[] = {
[0] = {
.start = GSC3280_PA_PS2_0,
.end = GSC3280_PA_PS2_0 + GSC3280_SZ_PS2_0 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_PS20_IRQ,
.end = EXT_GSC3280_PS20_IRQ,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device gsc3280_device_PS2_0 = {
.name = "gsc3280_ps2",
.id = 0,
.dev = {
.platform_data = &ps2_0_type,
},
.num_resources = ARRAY_SIZE(gsc3280_PS2_0_resource),
.resource = gsc3280_PS2_0_resource,
};
#endif
#ifdef CONFIG_PS2_1
static int ps2_1_type = CONFIG_PS2_1_TYPE;
static struct resource gsc3280_PS2_1_resource[] = {
[0] = {
.start = GSC3280_PA_PS2_1,
.end = GSC3280_PA_PS2_1 + GSC3280_SZ_PS2_1 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_PS21_IRQ,
.end = EXT_GSC3280_PS21_IRQ,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device gsc3280_device_PS2_1 = {
.name = "gsc3280_ps2",
.id = 1,
.dev = {
.platform_data = &ps2_1_type,
},
.num_resources = ARRAY_SIZE(gsc3280_PS2_1_resource),
.resource = gsc3280_PS2_1_resource,
};
#endif
#endif
/*----------------------------------------------------------------------------*/
/* NAND controller */
#ifdef CONFIG_MTD_NAND_GSC3280
static struct resource gsc3280_nand_resources[] = {
{
.name = "nandmmio",
.start = GSC3280_NFC_BASEADDR & 0x1fffffff,
.end = (GSC3280_NFC_BASEADDR & 0x1fffffff)+ 0x1300+0x8c-1,
.flags = IORESOURCE_MEM,
},{
.name = "nandirq",
.start = EXT_GSC3280_NFC_IRQ,
.end = EXT_GSC3280_NFC_IRQ,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device gsc3280_nand_device = {
.name = "gsc3280-nand",
.num_resources = ARRAY_SIZE(gsc3280_nand_resources),
.resource = gsc3280_nand_resources,
// .dev ={
// .platform_data=&gsc3280_platform_default_nand,
// }
};
#endif
/* LCD controller */
#ifdef CONFIG_FB_GSC3280
struct resource gsc3280_lcdc_resources[] = {
{
.name = "gsc3280-fbmem",
.start = GSC3280_LCDC_BASEADDR & 0x1fffffff,
.end = (GSC3280_LCDC_BASEADDR & 0x1fffffff) + 0x20 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct fb_videomode gsc3280_video_modes[1] = {
#ifdef CONFIG_FB_GSC3280_VGA
#ifdef CONFIG_FB_GSC3280_SVGA
{
.name = "1280x960",
.xres = 1280,
.yres = 960,
.refresh = 60,
.left_margin = 46,
.right_margin = 40,
.upper_margin = 30,
.lower_margin = 15,
.hsync_len = 42,
.vsync_len = 1,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
#else
{
.name = "1024x768",
.xres = 1024,
.yres = 768,
.refresh = 60,
.left_margin = 46,
.right_margin = 40,
.upper_margin = 30,
.lower_margin = 15,
.hsync_len = 42,
.vsync_len = 1,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
#endif
#else
{
.name = "800x480",
.xres = 800,
.yres = 480,
.refresh = 60,
.hsync_len = 39,
.left_margin = 0,
.vsync_len = 3,
.upper_margin = 19,
.right_margin = 40,
.lower_margin = 15,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
#endif
};
static struct gsc3280_fb_platform_data gsc3280_fb_pdata = {
.bpp = 16,
.num_modes = ARRAY_SIZE(gsc3280_video_modes),
.modes = gsc3280_video_modes,
};
static struct platform_device gsc3280_lcdc_device = {
.name = "gsc3280-lcdfb",
.id = -1,
.resource = gsc3280_lcdc_resources,
.num_resources = ARRAY_SIZE(gsc3280_lcdc_resources),
.dev = {
.dma_mask = &gsc3280_lcdc_device.dev.coherent_dma_mask,
.coherent_dma_mask = ((1ULL << (32)) - 1) ,
.platform_data = &gsc3280_fb_pdata,
},
};
#endif
#ifdef CONFIG_CAN_GSC3280
/* can */
static struct resource gsc3280_can_resources[] = {
{
.start = GSC3280_CAN_BASEADDR & 0x1fffffff,
.end = ( GSC3280_CAN_BASEADDR & 0x1fffffff ) + 0x100,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_CAN_IRQ,
.end = EXT_GSC3280_CAN_IRQ,
.flags = IORESOURCE_IRQ,
},
};
unsigned short can_data;
static struct platform_device gsc3280_device_can = {
.name = "gsc3280_can_driver",
.id = 0,
.num_resources = ARRAY_SIZE(gsc3280_can_resources),
.resource = gsc3280_can_resources,
.dev = {
.platform_data = &can_data,
},
};
#endif
// timer is not platform device! timer is internal module
/*
static struct resource gsc3280_timer_resources[] = {
{
.start = GSC3280_TIMER_BASEADDR & 0x1fffffff,
.end = ( GSC3280_TIMER_BASEADDR & 0x1fffffff ) + 0x100,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_TIMER_IRQ,
.end = EXT_GSC3280_TIMER_IRQ,
.flags = IORESOURCE_IRQ
},
};
static struct platform_device gsc3280_device_timer = {
.name = "gsc3280_timer",
.id = -1,
.num_resources = 2,
.resource = gsc3280_timer_resources,
};
*/
/* watch dog */
#ifdef CONFIG_GSC3280_WDT
static struct resource gsc3280_wdt_resources[] = {
{
.start = GSC3280_WATCHDOG_BASEADDR & 0x1fffffff,
.end = (GSC3280_WATCHDOG_BASEADDR & 0x1fffffff ) + 0x100,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_WATCHDOG_IRQ,
.end = EXT_GSC3280_WATCHDOG_IRQ,
.flags = IORESOURCE_IRQ
},
};
static struct platform_device gsc3280_wdt_device = {
.name = "gsc3280-watchdog",
.id = -1,
.num_resources = ARRAY_SIZE(gsc3280_wdt_resources),
.resource = gsc3280_wdt_resources,
};
#endif
/* i2c */
#ifdef CONFIG_I2C_GSC3280
static struct resource gsc3280_i2c_resources[] = {
{
.start = GSC3280_I2C_BASEADDR & 0x1fffffff,
.end = (GSC3280_I2C_BASEADDR & 0x1fffffff) + 0xA8 - 1,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_I2C_IRQ,
.end = EXT_GSC3280_I2C_IRQ,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device gsc3280_i2c_device = {
.name = "gsc3280-i2c",
.id = 0,
.dev = {
.coherent_dma_mask = ~0,
},
.num_resources = ARRAY_SIZE(gsc3280_i2c_resources),
.resource = gsc3280_i2c_resources,
};
#endif
/* i2s */
#ifdef CONFIG_SND_GSC3280_SOC_I2S
static struct resource gsc3280_i2s_resources[] = {
{
.start = GSC3280_I2S_BASEADDR & 0x1fffffff,
.end = (GSC3280_I2S_BASEADDR & 0x1fffffff) + 0x54 - 1,
.flags = IORESOURCE_MEM,
},
};
struct platform_device gsc3280_i2s_device = {
.name = "gsc3280-i2s",
.id = -1,
.num_resources = ARRAY_SIZE(gsc3280_i2s_resources),
.resource = gsc3280_i2s_resources,
};
#endif
/* pwm */
#ifdef CONFIG_GSC3280_PWM
static struct resource gsc3280_pwm_resource[] = {
{
.start = GSC3280_PWM_BASEADDR & 0x1fffffff ,
.end = (GSC3280_PWM_BASEADDR & 0x1fffffff) + 0x8c - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device gsc3280_pwm_device = {
.name = "gsc3280-pwm",
.id = 0,
.num_resources = ARRAY_SIZE(gsc3280_pwm_resource),
.resource = gsc3280_pwm_resource,
};
#endif
/* dmac */
#ifdef CONFIG_DMAC_GSC3280
static struct resource gsc3280_dmac_resource[] = {
{
.start = GSC3280_DMA_BASEADDR & 0x1fffffff,
.end = (GSC3280_DMA_BASEADDR & 0x1fffffff)+ 0x400 -1,
.flags = IORESOURCE_MEM,
},
{
.start = EXT_GSC3280_DMA_IRQ,
.end = EXT_GSC3280_DMA_IRQ,
.flags = IORESOURCE_IRQ,
}
};
struct gsc3280_dma_platform_data dmac_pdata={
.nr_channels = 4,
.is_private = false,
.chan_allocation_order = 0,
.chan_priority = 0,
};
struct platform_device gsc3280_dmac_device = {
.name = "gsc3280_dmac",
.id = 0,
.num_resources = ARRAY_SIZE(gsc3280_dmac_resource),
.resource = gsc3280_dmac_resource,
.dev ={
.platform_data = &dmac_pdata,
}
};
#endif
struct gsc3280_spi_dma_platform_data spi_platform_data = {
#ifdef CONFIG_DMAC_GSC3280
.dmas_tx.dma_dev = &(gsc3280_dmac_device.dev),
.dmas_rx.dma_dev = &(gsc3280_dmac_device.dev),
#endif
};
/* serial */
struct serial_platform_data serial_data = {
#ifdef CONFIG_DMAC_GSC3280
.tx_s.dma_dev = &(gsc3280_dmac_device.dev),
.rx_s.dma_dev = &(gsc3280_dmac_device.dev),
#endif
};
/* pcm */
#ifdef CONFIG_SND_SOC
static u64 pcm_dmamask = DMA_BIT_MASK(32);
static struct pcm_platform_data pcm_data={
.tx_s.dma_dev = &(gsc3280_dmac_device.dev),
.rx_s.dma_dev = &(gsc3280_dmac_device.dev),
};
struct platform_device gsc3280_pcm_device = {
.name = "gsc3280-pcm-audio",
.id = -1,
.dev ={
.dma_mask = &pcm_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &pcm_data,
}
};
#endif
/* SCI (7816) controller */
#if defined(CONFIG_GSC3280_SCI)
#ifdef CONFIG_SCI0
static struct gsc3280_sci_platform_data sci0_platform_data={
.clk_rate = 4,
.clock = "sci0",
.detect = 0,
};
static struct resource sci0_resources[] = {
[0] = {
.start =(GSC3280_SCI0_BASEADDR&0x1fffffff) ,
.end = (GSC3280_SCI0_BASEADDR&0x1fffffff) + 0x30 - 1 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_SCI0_IRQ,
.end = EXT_GSC3280_SCI0_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_sci0_device = {
.name = "gsc3280-sci",
.id = 0,
.dev = {
.platform_data = &sci0_platform_data,
},
.resource = sci0_resources,
.num_resources = ARRAY_SIZE(sci0_resources),
};
#endif
#ifdef CONFIG_SCI1_1
static struct gsc3280_sci_platform_data sci1_platform_data={
.clk_rate = 4,
.clock = "sci1",
.detect = 1,
};
static struct resource sci1_resources[] = {
[0] = {
.start = GSC3280_SCI1_BASEADDR&0x1fffffff,
.end = (GSC3280_SCI1_BASEADDR&0x1fffffff)+ 0x30 - 1 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_SCI1_IRQ,
.end = EXT_GSC3280_SCI1_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_sci1_device = {
.name = "gsc3280-sci",
.id = 1,
.dev = {
.platform_data = &sci1_platform_data,
},
.resource = sci1_resources,
.num_resources = ARRAY_SIZE(sci1_resources),
};
#endif
#endif
#if defined(CONFIG_GSC_SPI0_ADC_CORE)
static struct resource gsc3280_adc_core_resources[] = {
{
.name = "adc-core",
.start = GSC3280_SPI0_BASEADDR,
.end = GSC3280_SPI0_BASEADDR + 0x90 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device gsc3280_adc_core_device = {
.name = "adc-core",
.id = -1,
.resource = gsc3280_adc_core_resources,
.num_resources = ARRAY_SIZE(gsc3280_adc_core_resources),
};
#endif
#if defined(CONFIG_TOUCHSCREEN_GSC3280)
static struct resource gsc3280_ts_resources[] = {
[0] = {
.start = GSC3280_SPI0_BASEADDR,
.end = GSC3280_SPI0_BASEADDR + 0x90 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_ADC_IRQ,
.end = EXT_GSC3280_ADC_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_ts_device = {
.name = "gsc3280-ts",
.id = -1,
.resource = gsc3280_ts_resources,
.num_resources = ARRAY_SIZE(gsc3280_ts_resources),
};
#endif
#if defined(CONFIG_GSC3280_OTG)
static struct resource gsc3280_otg_resources[] = {
[0] = {
.start = GSC3280_USB_BASEADDR&0x1fffffff,
.end = (GSC3280_USB_BASEADDR&0x1fffffff) + SZ_256K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_USB_IRQ,
.end = EXT_GSC3280_USB_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_otg_device = {
.name = "gsc3280_otg",
.id = -1,
.dev = {
.platform_data = NULL,
},
.resource = gsc3280_otg_resources,
.num_resources = ARRAY_SIZE(gsc3280_otg_resources),
};
#endif
/* one wire ts */
#if defined(CONFIG_GSC3280_1WIRE_TS)
static struct platform_device ts_1wire_device = {
.name = "ts_1wire_device",
.id = -1,
};
#endif
/* SPI controller */
#if defined(CONFIG_GSC3280_SPI)
#ifdef CONFIG_SPI0
static struct resource spi0_resources[] = {
[0] = {
.start = (GSC3280_SPI0_BASEADDR & 0x1fffffff) ,
.end = (GSC3280_SPI0_BASEADDR & 0x1fffffff) + 0x54 - 1 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_SPI0_IRQ,
.end = EXT_GSC3280_SPI0_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_spi0_device = {
.name = "gsc3280-spi",
.id = 0,
.dev = {
#ifdef CONFIG_GSC3280_SPI_DMA
.dma_mask = NULL,
.coherent_dma_mask = DMA_BIT_MASK(32),
#endif
.platform_data = "spi0",
},
.resource = spi0_resources,
.num_resources = ARRAY_SIZE(spi0_resources),
};
#endif
#ifdef CONFIG_SPI1
static struct resource spi1_resources[] = {
[0] = {
.start = GSC3280_SPI1_BASEADDR & 0x1fffffff,
.end = (GSC3280_SPI1_BASEADDR & 0x1fffffff)+ 0x54 - 1 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EXT_GSC3280_SPI1_IRQ,
.end = EXT_GSC3280_SPI1_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device gsc3280_spi1_device = {
.name = "gsc3280-spi",
.id = 1,
.dev = {
#ifdef CONFIG_GSC3280_SPI_DMA
.dma_mask = NULL,
.coherent_dma_mask = DMA_BIT_MASK(32),
#endif
.platform_data = "spi1",
},
.resource = spi1_resources,
.num_resources = ARRAY_SIZE(spi1_resources),
};
#endif
/* SPI devices */
#if defined(CONFIG_MTD_M25P80)
static struct mtd_partition default_sf_parts[] = {
[0] = {
.name = "part0",
.offset = 0,
.size = MTDPART_SIZ_FULL, //0x800000 8M
},
};
static struct flash_platform_data sf_default = {
.parts = default_sf_parts,
.nr_parts = ARRAY_SIZE(default_sf_parts),
};
#endif //end #if defined(CONFIG_MTD_M25P80)
#if defined(CONFIG_SPI_SPIDEV)
static struct gsc3280_spi_info gsc3280_spi1_dev_platdata = {
//.cs_type = 1,
//.pin_cs = {87},
.cs_type = 0,
.pin_cnt = 1,
.cs_value = 0,
.bits_per_word = 8,
};
#endif
#if defined(CONFIG_SPI_FLASH_W25Q)
static struct gsc3280_spi_info w25q_spi1_dev_platdata = {
.cs_type = 0,
//.pin_cs = {87}, //87 61
//.pin_cnt = 1,
.cs_value = 0,
.lsb_flg = 0,
.bits_per_word = 8,
.poll_mode =0,
};
#endif
#if defined(CONFIG_SPI_POWER_ATT7022)
static struct gsc3280_spi_info att7022_platdata = {
.cs_type = 0,
.pin_cs = 29,
.cs_value = 0,
.lsb_flg = 0,
.bits_per_word = 8,
.poll_mode = 0,
};
#endif
#if defined(CONFIG_MTD_M25P80)
static struct gsc3280_spi_info m25p_platdata = {
.cs_type = 0,
// .pin_cs[0] = 87,
// .pin_cnt = 1,
.cs_value = 0,
.lsb_flg = 0,
.bits_per_word = 8,
.poll_mode = 1,
};
#endif
static struct spi_board_info gsc3280_spi_devices[] = {
#if defined(CONFIG_MTD_M25P80)
{
/* SpiFlash */
.modalias = "m25p80",
.bus_num = 1,
.chip_select = 1,
.mode = SPI_MODE_0,
.max_speed_hz = 10 * 1000 * 1000,
.controller_data = &m25p_platdata,
.platform_data = &sf_default,
},
#endif
#if defined(CONFIG_SPI_SPIDEV)
{
.modalias = "spidev",
.bus_num = 1,
.chip_select = 1,
.mode = SPI_MODE_3,
.max_speed_hz = 5 * 1000 * 1000,
.controller_data = &gsc3280_spi1_dev_platdata,
},
#endif
#if defined(CONFIG_SPI_FLASH_W25Q)
{
.modalias = "spi-w25q",
.bus_num = 1,
.chip_select = 2,
.mode = SPI_MODE_3,
.max_speed_hz = 5 * 1000 * 1000,
.controller_data = &w25q_spi1_dev_platdata,
},
#endif
#if defined(CONFIG_SPI_POWER_ATT7022)
{
.modalias = "spi-att7022",
.bus_num = 1,
.chip_select = 3,
.mode = SPI_MODE_1,
.max_speed_hz = 1 * 1000 * 1000,
.controller_data = &att7022_platdata,
},
#endif
};
static int __init gsc3280_spi_devices_init(void)
{
spi_register_board_info(gsc3280_spi_devices, ARRAY_SIZE(gsc3280_spi_devices));
return 0;
}
device_initcall(gsc3280_spi_devices_init);
#endif //end #if defined(CONFIG_GSC3280_SPI)
#ifdef CONFIG_ANDROID_RAM_CONSOLE
#ifndef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
extern struct resource ram_console_res;
static struct resource ram_console_resources[1];
static struct platform_device ram_console_platform_device = {
.name = "ram_console",
.id = -1,
.num_resources = ARRAY_SIZE(ram_console_resources),
.resource = ram_console_resources,
};
#endif /* !_EARLY_INIT */
#endif
static struct platform_device *gsc3280_devices[] __initdata = {
#ifdef CONFIG_GSC3280MAC_ETH
&gsc3280macphy0_device,
&gsc3280maceth0_device,
#endif
#ifdef CONFIG_DMAC_GSC3280
&gsc3280_dmac_device,
#endif
#ifdef CONFIG_MMC_GSC3280
&gsc3280_sd_device,
#endif
#ifdef CONFIG_KEYPAD_GSC3280
&gsc3280_device_keypad,
#endif
#ifdef CONFIG_SERIO_GSC3280PS2
#ifdef CONFIG_PS2_0
&gsc3280_device_PS2_0,
#endif
#ifdef CONFIG_PS2_1
&gsc3280_device_PS2_1,
#endif
#endif
#ifdef CONFIG_MTD_NAND_GSC3280
&gsc3280_nand_device,
#endif
//#ifdef CONFIG_FB_GSC3280
// &gsc3280_lcdc_device,
//#endif
#ifdef CONFIG_CAN_GSC3280
&gsc3280_device_can,
#endif
//&gsc3280_device_timer,
#ifdef CONFIG_GSC3280_WDT
&gsc3280_wdt_device,
#endif
#ifdef CONFIG_I2C_GSC3280
&gsc3280_i2c_device,
#endif
#ifdef CONFIG_SND_GSC3280_SOC_I2S
&gsc3280_i2s_device,
#endif
#ifdef CONFIG_SND_SOC
&gsc3280_pcm_device,
#endif
#ifdef CONFIG_GSC3280_PWM
&gsc3280_pwm_device,
#endif
#if defined(CONFIG_GSC_SPI0_ADC_CORE)
&gsc3280_adc_core_device,
#endif
#if defined(CONFIG_TOUCHSCREEN_GSC3280)
&gsc3280_ts_device,
#endif
#ifdef CONFIG_GSC3280_1WIRE_TS
&ts_1wire_device,
#endif
#if defined(CONFIG_GSC3280_SPI)
#ifdef CONFIG_SPI0
&gsc3280_spi0_device,
#endif
#ifdef CONFIG_SPI1
&gsc3280_spi1_device,
#endif
#endif
#if defined(CONFIG_GSC3280_SCI)
#ifdef CONFIG_SCI0
&gsc3280_sci0_device,
#endif
#ifdef CONFIG_SCI1_1
&gsc3280_sci1_device,
#endif
#endif
#if defined(CONFIG_GSC3280_OTG)
&gsc3280_otg_device,
#endif
#ifdef CONFIG_FB_GSC3280
&gsc3280_lcdc_device,
#endif
#ifdef CONFIG_ANDROID_RAM_CONSOLE
#ifndef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
&ram_console_platform_device
#endif
#endif /* CONFIG_ANDROID_RAM_CONSOLE */
};
/*----------------------------------------------------------------------------*/
static int __init gsc3280_init(void)
{
gsc3280_mod_iomux_init();
#ifdef CONFIG_ANDROID_RAM_CONSOLE
#ifndef CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT
ram_console_resources[0].start = ram_console_res.start;
ram_console_resources[0].end = ram_console_res.end;
ram_console_resources[0].flags = ram_console_res.flags;
#endif
#endif /* CONFIG_ANDROID_RAM_CONSOLE */
return platform_add_devices(gsc3280_devices, ARRAY_SIZE(gsc3280_devices));
}
arch_initcall(gsc3280_init);
#ifdef CONFIG_I2C_GSC3280
#ifdef CONFIG_SND_SOC_ALC5623
static struct alc5623_platform_data alc5623_data = {
.add_ctrl = 0x3700,
.jack_det_ctrl = 0x4810,
};
#endif
static struct i2c_board_info i2c_devices_info[] = {
#ifdef CONFIG_SND_SOC_ALC5623
{
I2C_BOARD_INFO("alc5623", 0x1a),
.platform_data = &alc5623_data,
},
#endif
#ifdef CONFIG_RTC_DRV_DS3231M
{
I2C_BOARD_INFO("ds3231m", 0x68),
.platform_data = NULL,
},
#endif
#ifdef CONFIG_RTC_DRV_PCF8563
{
I2C_BOARD_INFO("pcf8563", 0x51),
.platform_data = NULL,
},
#endif
#ifdef CONFIG_GSC3280_NS2009
{
I2C_BOARD_INFO("ns2009",0x48),
.platform_data = NULL,
}
#endif
#ifdef CONFIG_OLED_SSD1306
{
I2C_BOARD_INFO("ssd1306",0x3c),
.platform_data = NULL,
}
#endif
#ifdef CONFIG_RTC_DRV_RX8025
{
I2C_BOARD_INFO("rx8025",0x32),
.platform_data = NULL,
}
#endif
};
static int __init gsc3280_i2c_devices_init(void)
{
i2c_register_board_info(0, i2c_devices_info, ARRAY_SIZE(i2c_devices_info));
return 0;
}
device_initcall(gsc3280_i2c_devices_init);
#endif