437 lines
10 KiB
C
437 lines
10 KiB
C
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/*
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* amr_gpodisp.c - driver for AMR Display in Loongson soc
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*
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* Copyright (C) 2012 Loongson Corporation
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*
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* 2013-01-31
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*/
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/rcupdate.h>
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#include <linux/platform_device.h>
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#include <linux/cdev.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/completion.h>
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#include <asm/io.h>
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#include <linux/fs.h>
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#include <linux/fcntl.h>
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#include <asm/uaccess.h>
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#include "amr_gpodisp.h"
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void gpio_nand_lock(void);
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void gpio_nand_unlock(void);
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#define AMRDISP_GET_IOMUX_LOCK() \
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do {\
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gpio_nand_lock();\
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} while (0)
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#define AMRDISP_PUT_IOMUX_LOCK() \
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do {\
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gpio_nand_unlock();\
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} while (0)
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/*----------------------------------------------------------------------------*/
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struct amr_gpodisp {
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struct cdev cdev;
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struct class *gpodisp_class;
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dev_t dev;
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bool display_init;
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};
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struct amr_gpodisp amrdisp_priv;
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unsigned char disp_mem[108][160];
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/*----------------------------------------------------------------------------*/
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static void gpo_wr_dat(unsigned char uc_dat)
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{
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u32 reg_val = 0;
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u32 dat_val = (u32)uc_dat;
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/*
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A0 -> GPIO26
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CS -> GPIO78
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RST -> GPIO24
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RD -> GPIO35
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WD -> GPIO36
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DAT -> GPIP38~45
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conflict module -> spi0;keypad;emi;iis;pwm
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*/
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/* RD set 1 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val |= (0x01 << 3);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* A0 set 1 */
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reg_val = *((volatile u32 *)0xbc110000);
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reg_val |= (0x01 << 26);
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*((volatile u32 *)0xbc110000) = reg_val;
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/* CS set 0 */
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reg_val = *((volatile u32 *)0xbc110018);
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reg_val &= ~(0x01 << 14);
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*((volatile u32 *)0xbc110018) = reg_val;
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/* WD set 0 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val &= ~(0x01 << 4);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* uc_dat >> data0~7 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val &= ~(0xff << 6);
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reg_val |= (dat_val << 6);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* WD set 1 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val |= (0x01 << 4);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* CS set 1 */
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reg_val = *((volatile u32 *)0xbc110018);
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reg_val |= (0x01 << 14);
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*((volatile u32 *)0xbc110018) = reg_val;
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}
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static void gpo_wr_cmd(unsigned char uc_cmd)
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{
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u32 reg_val = 0;
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volatile u32 cmd_val = (u32)uc_cmd;
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/*
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A0 -> GPIO26
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CS -> GPIO78
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RST -> GPIO87
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RD -> GPIO35
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WD -> GPIO36
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DAT -> GPIP38~45
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conflict module -> spi0;keypad;emi;iis;pwm
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*/
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/* RD set 1 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val |= (0x01 << 3);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* A0 set 0 */
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reg_val = *((volatile u32 *)0xbc110000);
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reg_val &= ~(0x01 << 26);
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*((volatile u32 *)0xbc110000) = reg_val;
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/* CS set 0 */
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reg_val = *((volatile u32 *)0xbc110018);
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reg_val &= ~(0x01 << 14);
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*((volatile u32 *)0xbc110018) = reg_val;
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/* WD set 0 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val &= ~(0x01 << 4);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* uc_dat >> data0~7 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val &= ~(0xff << 6);
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reg_val |= (cmd_val << 6);
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*((u32 *)0xbc11000c) = reg_val;
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/* WD set 1 */
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reg_val = *((volatile u32 *)0xbc11000c);
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reg_val |= (0x01 << 4);
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*((volatile u32 *)0xbc11000c) = reg_val;
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/* CS set 1 */
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reg_val = *((volatile u32 *)0xbc110018);
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reg_val |= (0x01 << 14);
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*((volatile u32 *)0xbc110018) = reg_val;
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}
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static void enable_gpo_disp_pin(void)
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{
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/*
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A0 -> GPIO26
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CS -> GPIO78
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RST -> GPIO87
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DAT -> GPIP38~45
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conflict module -> spi0;keypad;emi;iis;pwm
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*/
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/* not support hw src */
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*((u32 *)0xbc110008) = 0;
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*((u32 *)0xbc110014) = 0;
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*((u32 *)0xbc110020) = 0;
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/* set gpioABC output */
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*((u32 *)0xbc110004) = 0x7000000 | *((volatile u32 *)0xbc110004);
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*((u32 *)0xbc110010) = 0x3fd8 | *((volatile u32 *)0xbc110010);
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*((u32 *)0xbc11001c) = 0x4000 | *((volatile u32 *)0xbc11001C);
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}
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static void reset_gpo_disp_dev(void)
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{
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//RST -> GPIO87
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u32 reg_val = 0;
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reg_val = *((u32 *)0xbc110000);
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reg_val &= ~(0x01 << 24);
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*((u32 *)0xbc110000) = reg_val;
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udelay(1000);
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reg_val = *((u32 *)0xbc110000);
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reg_val |= (0x01 << 24);
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*((u32 *)0xbc110000) = reg_val;
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udelay(1000);
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}
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static void gpo_disp_backlight_ctrl(unsigned char arg)
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{
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u32 reg_val = 0;
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if (arg)
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{
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reg_val = *((u32 *)0xbc110000);
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reg_val &= ~(0x01 << 25);
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*((u32 *)0xbc110000) = reg_val;
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}
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else
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{
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reg_val = *((u32 *)0xbc110000);
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reg_val |= (0x01 << 25);
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*((u32 *)0xbc110000) = reg_val;
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}
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}
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static void gpo_disp_ctrl_init(void)
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{
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gpo_wr_cmd(0xE2); //System Reset
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udelay(100000);
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gpo_wr_cmd(0xAE); //Set Display Disable
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gpo_wr_cmd(0x25); //Set Temperature Compensation (00-0.00%)
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gpo_wr_cmd(0x2B); //Set Power Control (Interal VLCD;Panel loading definition>13nF)
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gpo_wr_cmd(0xE9); //Set LCD Bias ratio:1/10
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gpo_wr_cmd(0x81); //Set gain and potentiometer Mode
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gpo_wr_cmd(0xC0); //Program Gain:01;PM value:xx
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gpo_wr_cmd(0x89); //Set RAM Address Control
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gpo_wr_cmd(0xC4); //Set LCD Maping Control (MY=1, MX=0)
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gpo_wr_cmd(0xDE); //Set COM Scan Function
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gpo_wr_cmd(0xC8); //Set N-Line Inversion
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gpo_wr_cmd(0x18); //Set COM Scan Function
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gpo_wr_cmd(0xA3); //Set Line Rate
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gpo_wr_cmd(0xD6); //Set Color Mode (64K)
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gpo_wr_cmd(0xD1); //Set Color Pattern (RGB)
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gpo_wr_cmd(0x84); //Set Partial Display Off
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gpo_wr_cmd(0xAD); //Set Display Enable
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amrdisp_priv.display_init = true;
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}
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/*---------------------------------------------------------------------------*/
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/*
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*/
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static ssize_t gpodisp_write(struct file *filp, const char __user *buf,
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size_t count, loff_t *f_pos)
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{
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unsigned char uc_RowCnt, uc_ColCnt;
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unsigned char uc_RowAddrH, uc_RowAddrL;
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if (sizeof(disp_mem) > count)
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return -EFAULT;
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if (copy_from_user(disp_mem, buf, count))
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return -EFAULT;
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if (amrdisp_priv.display_init == false)
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gpo_disp_ctrl_init();
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for (uc_RowCnt = 0; uc_RowCnt < 160; uc_RowCnt++)
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{
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uc_RowAddrH = uc_RowCnt / 16;
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uc_RowAddrL = uc_RowCnt % 16;
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gpo_wr_cmd(0x70 | uc_RowAddrH); //Set Row Address(MSB)
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gpo_wr_cmd(0x60 | uc_RowAddrL); //Set Row Address(LSB)
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gpo_wr_cmd(0x12); //Set Address(MSB)
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gpo_wr_cmd(0x05); //Set Address(LSB)
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for (uc_ColCnt = 0; uc_ColCnt < 108; uc_ColCnt++)
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{
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gpo_wr_dat(disp_mem[uc_ColCnt][uc_RowCnt]);
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}
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}
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return 0;
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}
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/*----------------------------------------------------------------------------*/
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/*
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*/
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static ssize_t gpodisp_read(struct file *filp, char __user *buf,
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size_t count, loff_t *f_pos)
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{
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return 0;
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}
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/*----------------------------------------------------------------------------*/
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/*
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*/
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static long gpodisp_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
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{
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unsigned char val = 0;
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if (_IOC_TYPE(cmd) != AMRDISP_IOC_MAGIC) return -ENOTTY;
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if (_IOC_NR(cmd) > AMRDISP_IOC_MAXNR) return -ENOTTY;
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__get_user(val, (unsigned char*)arg);
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AMRDISP_GET_IOMUX_LOCK();
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switch(cmd) {
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case AMRDISP_CMD:
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if (arg) {
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gpo_wr_cmd(val);
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}
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break;
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case AMRDISP_DAT:
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if (arg) {
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gpo_wr_dat(val);
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}
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break;
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case AMRDISP_RST:
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reset_gpo_disp_dev();
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break;
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case AMRDISP_INITPIN:
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enable_gpo_disp_pin();
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break;
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case AMRDISPLAY_CTRL_INIT:
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gpo_disp_ctrl_init();
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break;
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case AMRDISPLAY_BACKLIGHT:
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gpo_disp_backlight_ctrl(1);
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break;
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case AMRDISPLAY_BACKCLEAR:
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gpo_disp_backlight_ctrl(0);
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break;
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default:
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return -ENOTTY;
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}
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AMRDISP_PUT_IOMUX_LOCK();
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return 0;
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}
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static int gpodisp_open(struct inode *inode, struct file *filp)
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{
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enable_gpo_disp_pin();
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reset_gpo_disp_dev();
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gpo_disp_ctrl_init();
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gpo_disp_backlight_ctrl(1);
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return 0;
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}
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static int gpodisp_release(struct inode *inode, struct file *filp)
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{
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return 0;
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}
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struct file_operations amrdisp_fops = {
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.owner = THIS_MODULE,
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.read = gpodisp_read,
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.write = gpodisp_write,
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.unlocked_ioctl = gpodisp_ioctl,
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.open = gpodisp_open,
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.release = gpodisp_release,
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};
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/*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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static int __init amr_gpodisp_init(void)
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{
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int err;
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int result;
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int major;
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result = alloc_chrdev_region(&amrdisp_priv.dev, 0, 0, "amrdisp");
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major = MAJOR(amrdisp_priv.dev);
|
||
|
|
if (result < 0) {
|
||
|
|
printk(KERN_WARNING "amrdisp: can't get major %d\n", major);
|
||
|
|
return result;
|
||
|
|
}
|
||
|
|
|
||
|
|
cdev_init(&amrdisp_priv.cdev, &amrdisp_fops);
|
||
|
|
amrdisp_priv.cdev.owner = THIS_MODULE;
|
||
|
|
amrdisp_priv.cdev.ops = &amrdisp_fops;
|
||
|
|
|
||
|
|
err = cdev_add(&amrdisp_priv.cdev, amrdisp_priv.dev, 1);
|
||
|
|
if (err) {
|
||
|
|
printk(KERN_NOTICE "Error[%d] cdev_add amrdisp\n", err);
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
amrdisp_priv.gpodisp_class = class_create(THIS_MODULE, "amr_gpodisp");
|
||
|
|
if (IS_ERR(amrdisp_priv.gpodisp_class)) {
|
||
|
|
printk(KERN_ERR "Failed in create amr_cdev class\n");
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
device_create(amrdisp_priv.gpodisp_class, NULL,
|
||
|
|
amrdisp_priv.dev,
|
||
|
|
NULL, "amrdisp");
|
||
|
|
amrdisp_priv.display_init = false;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
static void __exit amr_gpodisp_exit(void)
|
||
|
|
{
|
||
|
|
cdev_del(&amrdisp_priv.cdev);
|
||
|
|
unregister_chrdev_region(amrdisp_priv.dev, 1);
|
||
|
|
device_destroy(amrdisp_priv.gpodisp_class, amrdisp_priv.dev);
|
||
|
|
class_destroy(amrdisp_priv.gpodisp_class);
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
|
||
|
|
module_init(amr_gpodisp_init);
|
||
|
|
module_exit(amr_gpodisp_exit);
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
|
||
|
|
MODULE_AUTHOR("ansonn.wang@gmail.com");
|
||
|
|
MODULE_DESCRIPTION("amr Gpo Display driver");
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
|
||
|
|
|
||
|
|
|